Mikroelektronika
Info: Kuliah Tamu (IC Design) Kamis 15 Februari 2018 pukul 10:00-selesai di Ruang 1.6 gd. A TEUB untuk kelas Mikroelka (A dan B)
Mikroelektronika (TKE4221 – 3 sks)
Tujuan : Memberikan kemampuan kepada mahasiswa untuk (1) dapat menjelaskan konsep-konsep dasar yang terkait dengan teknologi mikroelektronik dan (2) mampu merancang IC berteknologi MOS
Pokok Bahasan : Pengenalan teknologi rangkaian terintegrasi, Klasifikasi Teknologi mikroelektronika, Bahan dan material Teknologi Film Tebal, Perancangan dan Proses Pembuatan Teknologi Film Tebal, Perancangan dan Proses Pembuatan Teknologi Film Tipis, Perancangan Logika MOS sederhana, Perancangan Rangkaian Digital NMOS, Perancangan Rangkaian Digital CMOS, Perancangan Rangkaian Terintegrasi Digital CMOS, Pertimbangan Perancangan IC CMOS, Simulasi menggunakan CAD VLSI, Desain Rangkaian Terintegrasi Analog CMOS, Simulasi Karakteristik Elektris Analog CMOS.
Daftar Pustaka :
Baker,R.J.,Li, H.W and Boyce,D.E., CMOS Circuit Design, Layout, And Simulation. New York: IEEE Press series, 2000.
Fabricius,E.D. Introduction To VLSI Design. Singapore: McGraw-Hill International Editions, 2009.
M. Julius St. Teknologi Film Tebal. Malang: Teknik Elektro Universitas Brawijaya, 2009.
Pucknell, Douglas A. and Eshraghian Kamran, Basic VLSI Design, Third Edition. Prentice Hall , 1994.
Randal L, Geiger, and Allen, Phillip E., VLSI Design Techniques forAnalog and Digital Circuits. Singapore: McGraw-Hill International Editions, 1990.
Sicard, Eteinne, Microwind3 Users Manual. France: INSA/DGEI 135, av de rangueil 31077 toulouse cedex 4. 2002.
Dowload Materi:
01 Pengenalan Teknologi Terintegrasi
02 Klasifikasi Teknologi Mikroelektronika
03 Teknologi Film Tebal
04 Teknologi Film Tipis
05 Teknologi Solid State
06.Dasar Teknologi MOS
06.MOS Transistor
06.MOS Fundamental
07 CMOS Design
UAS Mikroelektronika – Genap 2016-2017
Supporting Material:
Design, Layout, and Simulation Examples
DSCH – Microwind , Layout Design and Simulation tool. manual, lecture
LASI – the LAyout System for Individuals.
Electric VLSI Design System – free and powerful CAD system for chip design (schematics, layout, DRC, LVS, ERC, etc.).
Cadence Design System – ubiquitous commercial tools.
Mentor Graphics – IC design, verification, design-for-manufacturability, and test technologies.
Silvaco Analog/Mixed-Signal/RF EDA – easy-to-use tools with good process design kit (PDK) availability.
SPICE Software, MOSFET Models, and MOSIS Information
The book’s SPICE simulation examples are available at LTspice, PSpice, HSPICE, and WinSpice.
The 50 nm and 1 um MOSFET models are found in cmosedu_models.txt (see also, BSIM4 manual).
Information on generating a GDSII (stream) file and help on submitting chips to MOSIS can be found here.
Downloads, Tutorials, and Videos
Download supporting material in:
SPICE.zip, Solutions.zip, Silvaco.zip, Mentor.zip, Cadence_IC61.zip, Cadence_IC51.zip, Figures.zip, and Electric.zip.
Tutorials from CMOSedu.com: Bad design, Cadence, Electric VLSI, LTspice, and Silvaco EDA.
