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Eka Maulana, ST., MT., M.Eng

Posts Tagged ‘Multiplexer’

DESIGN OF 16 TO 1 MULTIPLEXER IC USING HIGH SPEED CMOS TECHNOLOGY

Eka Maulanaa, M Julius Stb, R Arief Setyawanc, Ceri Ad, Tito Panca Ne

abc Lecturer, Department of Electrical Engineering, Brawijaya University,
Jln. MT Haryono no. 167, Malang, Indonesia; Tel: + 62-81-233262589;
E-mail:
ekamaulana@ub.ac.id, mjulius.st@gmail.com, rarief@ub.ac.id

de Under Graduate, Department of Electrical Engineering, Brawijaya University,
Jln. MT Haryono no. 167, Malang, Indonesia; Tel: + 62-81-234685695;
E-mail: ceri.ahend4390@gmail.com, titopancanugraha@gmail.com

ABSTRACT

In this research is designed a digital multiplexer IC of 16 to 1 High Speed Complementary Metal Oxide Semiconductor (HCMOS) for digital circuit applications. The purpose of this research is an analysis to improve the CMOS characteristic such as Voltage Transfer Characteristic (VTC), propagation delay, and power dissipation, ie: to minimize the value of propagation delay and power dissipation than previous CMOS design. The HCMOS schematic and layout was drawn in DSCH and Microwind2 software, respectively. A PSpice simulation software was used to test the schematic characteristic. A 5 volt DC power supply was used in this schematic design and coupling capacitor was ≤ 5pF. We used the maximum frequence, KN, KP parameters of 10 MHz, 40 µA/V2 and 16µA/V2, respectively. This design is supposed to be an average propagation delay of less than 70 ns.The result of research shows that VTC are VIL = 2.92 volt, VOL = 0 volt, VIH = 2.94 volt, and VOH = 5 volt; then the Noise Margins are NMH = 2.06V and NML = 2.92V. The simulation result of time propagation delay are tPLH = 9.79 ns, tPHL = 3.92 ns, and tPD = 6.85 ns. The output of power dissipation is 125µW. The design of schematic layout area without I/O pad is 1189,1 µm x 23,3 µm and the area with I/O pad is 1625.5 µm x 1625.5 µm. Based on simulation results show that the specification and design of 16 to 1 Multiplexer IC by using High Speed ​​CMOS technology (HCMOS) has the speed 13.43 ns faster than DM74150 TTL and 152.25 ns faster than MM54C150J CMOS IC. Comparing to the both of ICs, the power dissipation of this design is 109.91 nJ lower than CMOS and 6.792 nJ lower than TTL IC.

KEY WORDS: Multiplexer, HCMOS, Propagation Delay, Power Dissipation

Full Paper (PDF)